Budapest University of Technology and Economics, Faculty of Electrical Engineering and Informatics

    Belépés
    címtáras azonosítással

    vissza a tantárgylistához   nyomtatható verzió    

    Digital Design

    A tantárgy neve magyarul / Name of the subject in Hungarian: Digitális technika

    Last updated: 2019. január 4.

    Budapest University of Technology and Economics
    Faculty of Electrical Engineering and Informatics
    Course ID Semester Assessment Credit Tantárgyfélév
    VIMIAA02   2/1/2/v 6  
    3. Course coordinator and department Dr. Fehér Béla, Méréstechnika és Információs Rendszerek Tanszék
    4. Instructors Béla Fehér, PhD. Vilmos Pálfi, PhD.
    5. Required knowledge
    6. Pre-requisites
    Kötelező:
    NEM (TárgyEredmény("BMEVIMIA111", "jegy", _) >= 2
    VAGY
    TárgyEredmény("BMEVIMIA111", "felvétel", AktualisFelev()) > 0
    VAGY
    TárgyEredmény("BMEVIMIAA01", "jegy", _) >= 2
    VAGY
    TárgyEredmény("BMEVIMIAA01", "felvétel", AktualisFelev()) > 0
    VAGY
    TárgyEredmény( "BMEVIMIAA01" , "aláírás" , _ ) = -1)

    ÉS (Training.Code=("5N-A8") VAGY Training.Code=("5NAA8"))

    A fenti forma a Neptun sajátja, ezen technikai okokból nem változtattunk.

    A kötelező előtanulmányi rendek grafikus formában itt láthatók.

    Ajánlott:
    See the BSc program in Computer Engineering:
    https://www.vik.bme.hu/document/832/original/SE_BSc_degree_program_mintatanterv_szakiranyokkal_20160530.pdf
    7. Objectives, learning outcomes and obtained knowledge The objective is to provide a modern approach to learning the topic of digital system design, and a good understanding of basic hardware components that underlies further studies in the area of computer engineering.
    8. Synopsis

    Combinational logic design

    Boolean logic gates, Boolean algebra, Representation of Boolean functions, Combinational logic design process, Decoders and multiplexers.

    Sequential logic design, controllers

    Storing a bit using Flip-Flops, Finite state machines, Controllers, Controller design.

    Datapath components

    Registers, Adders, Shifters, Comparators, Counters, Multipliers (array style), Subtractors, Arithmetic-Logic Units, Register Files.

    Register-transfer level design

    Register transfer level (RTL) design method, RTL design examples and issues, Clock frequency, Behavioral level design, Memory components, Queues.

    Programmable processors

    Basic architecture, A three-instruction programmable processor, Example Assembly and Machine programs. 

    The MiniRISC system

    Internal structure. Datapath and control unit. Application of the MiniRISC CPU. Signal interfaces, I/O extensions with examples. 

    Assembly programming

    Development environment, MiniRISC assembler, MiniRISC IDE, Software development with examples. 

    Hardware description languages

    Combinational logic description. Sequential logic description. Datapath component description. RTL Design using HDL. Examples. 

     

    9. Method of instruction 2 lectures, 1 seminar and 2 laboratories each week.
    10. Assessment

    During the semester:

    • Students must collect a sum of 40 points for the signature. 60 points can be obtained from the mid-term test, 15-15 points can be obtained from the 1st and 2nd homework, and 10 points can be obtained from laboratories. There is no minimum requirement for the mid-term test and the homeworks, only the total number of points is taken into account.
    • Students must not be absent from more than 2 laboratories, and more than 4 practices. Two laboratories can be retaken at the end of the semester.

    Exam period:

    • Written exam, the minimum score is 40%. The final result is calculated from the semester results (25%) and the final exam (75%).
    11. Recaps The mid-term exam can be repeated on an organized repeated mid-term exam during the semester, and on a 2nd organized repeated mid-term in the repetition period following the semester.
    12. Consultations Consultations are by appointment.
    13. References, textbooks and resources

    Vahid, F. and Wiley, J., 2007. Digital design. J. Wiley & Sons.

    Béla Fehér, Tamás Raikovich, Attila Fejér, 2014. The MiniRISC processor. BME MIT.
    (http://home.mit.bme.hu/~rtamas/DigitalDesign/MiniRISC_CPU.pdf)

    14. Required learning hours and assignment

    Lectures

    70

    Preparation for lectures

    7

    Preparation for practice

    7

    Preparation for laboratory

    14

    Preparation for mid-term test

    18

    Homeworks

    16

    Preparation for exam

    48

    Total

    180

    15. Syllabus prepared by Béla Fehér, PhD. Department of Measurement and Information Systems.