System-Level Design

A tantárgy neve magyarul / Name of the subject in Hungarian: Rendszerszintű tervezés

Last updated: 2015. március 7.

Budapest University of Technology and Economics
Faculty of Electrical Engineering and Informatics
Branch of Electrical Engineering
Micro- and Nanoelectronics Specialization
Course ID Semester Assessment Credit Tantárgyfélév
VIEEM163 1 2/1/0/v 4  
3. Course coordinator and department dr. Hosszú Gábor,
4. Instructors

Dr. Gábor Hosszú

Assoc. Prof.

Dept. of Electron Devices

Dr. Zoltán Czirkos

Assistant Prof.

Dept. of Electron Devices

Dr. András Timár

Assistant Prof.

Dept. of Electron Devices

Péter Horváth

Assistant Lecturer

Dept. of Electron Devices

5. Required knowledge Electronics 1-2, Digital Technique 1, Programming
6. Pre-requisites
Kötelező:
NEM ( TárgyEredmény( "BMEVIEEMA01" , "jegy" , _ ) >= 2
VAGY
TárgyEredmény("BMEVIEEMA01", "FELVETEL", AktualisFelev()) > 0)

A fenti forma a Neptun sajátja, ezen technikai okokból nem változtattunk.

A kötelező előtanulmányi rend az adott szak honlapján és képzési programjában található.

Ajánlott:
-
7. Objectives, learning outcomes and obtained knowledge The subject presents the design, implementation and verification of the hardware. The actual trands and ther influence are also discussed.
8. Synopsis

Introduction: The alternatives of the system realization. The full custom system, the processor (controller) " firmware and the programable gate arrays.

Design methods: the top-down and the bottom-up style. Automatization, silicon compilers.

 

Simulation methods, software solutions 

 

System level modelling. Available harware modeling languages: SystemC, VHDL, Verilog, and Verilog-AMS.

 

The detailed study of the VHDL and Verilog languages.

 

The introduction to the SystemC and CatapultC languages. Design practices.

 

Challenges of the analogue and mixed mode simulation. The Verilog-AMS language.

 

The physical realization: ROM memory blocks, FPGA and FPLA matrices, microcontrollers, and ASIC.

 

The system synthesis for different technologies: FPGA, FPAA, FPMA, SiP and SoC.

 

Hardware-software co-design, VC (Virtual Component) and IP (Intellectual Property) bsed design.

 

Testing and verification. Design for testability(Dft).

9. Method of instruction

3 hours/week lectures and computer based demonstration with examples.

10. Assessment

a. In the class period: one midterm test.

Requirement for the signature: final mark >= 2 (satisfactory).

Final mark is based on the result of the mid-term test.

Threshold for satisfactory results: minimum 40% of the maximal score.

b. In the examination period: n.a.

c. Exam before the examination period: possible.

11. Recaps One midterm test.
12. Consultations By appointment.
13. References, textbooks and resources

Handouts.

Optional: Giovanni de Micheli és Mariagiovanna Sami: „Hardware/software co-design” Kluwer Publisher 1996. ISBN 0-7923-3882-0

14. Required learning hours and assignment
Classes 42
Preparation for classes10 
Preparation for test 20
Homework -
Learning of prescribed matters -
Preparation for exam 48
Sum 120
15. Syllabus prepared by

Dr. Gábor Hosszú

Assoc. Prof.

Dept. of Electron Devices

Dr. Zoltán Czirkos

Assistant Prof.

Dept. of Electron Devices

Gergely Nagy

Assistant Lect.

Dept. of Electron Devices

Dr. András Poppe

Assoc. Prof.

Dept. of Electron Devices